TERMINAL OBJECTIVE - h1016v2

Engineering Symbology Prints and Drawings Volume 2 of 2
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Logic Diagrams DOE-HDBK-1016/2-93 OBJECTIVES TERMINAL OBJECTIVE 1.0 Given a logic diagram, READ and INTERPRET the diagrams. ENABLING OBJECTIVES 1.1 IDENTIFY the symbols used on logic diagrams to represent the following components: a. AND gate h. Adder b. NAND gate i. Time-delay c. COINCIDENCE gate j. Counter d. OR gate k. Shift register e. NOR gate l. Flip-flop f. EXCLUSIVE OR gate m. Logic memories g. NOT gate or inverter 1.2 EXPLAIN the operation of the three types of time delay devices. 1.3 DEVELOP the truth tables for the following logic gates: a. AND gate d. NAND gate b. OR gate e. NOR gate c. NOT gate f. EXCLUSIVE OR gate 1.4 IDENTIFY the symbols used to denote a logical 1 (or high) and a logical 0 (or low) as used in logic diagrams. 1.5 Given a logic diagram and appropriate information, DETERMINE the output of each component and the logic circuit. Rev. 0 Page v PR-05

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